Course Name: Digital VLSI Testing

Course abstract

Testing is an integral part of the VLSI design cycle. With the advancement in IC technology, designs are becoming more and more complex, making their testing challenging. Testing occupies 60-80% time of the design process. A well structured method for testing needs to be followed to ensure high yield and proper detection of faulty chips after manufacturing. Design for testability (DFT) is a matured domain now, and thus needs to be followed by all the VLSI designers. In this context, the course attempts to expose the students and practitioners to the most recent, yet fundamental, VLSI test principles and DFT architectures in an effort to help them design better quality products that can be reliably manufactured in large quantity.


Course Instructor

Media Object

Prof. Santanu Chattopadhyay

Santanu Chattopadhyay received his PhD from Indian Institute of Technology (IIT) Kharagpur in 1996. He is currently a Professor in the Department of Electronics and Electrical Communication Engineering, IIT Kharagpur. His research interests include Embedded Systems, System-on-Chip (SoC) and Network-on-Chip (NoC) Design and Test, Power- and Thermal-aware Testing of VLSI Circuits and Systems. He has published more than 150 papers in reputed international journals and conferences. He has published several text and reference books in the related areas. He is a senior member of IEEE and an editorial board member of IET Circuits Devices and Systems.
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Teaching Assistant(s)

No teaching assistant data available for this course yet
 Course Duration : Sep-Dec 2020
  View Course
 Enrollment : 20-May-2020 to 21-Sep-2020
 Exam registration : 14-Sep-2020 to 02-Nov-2020
 Exam Date : 19-Dec-2020

Enrolled

5080

Registered

250

Certificate Eligible

149

Certified Category Count

Gold

1

Silver

7

Elite

41

Successfully completed

100

Participation

67

Success

Elite

Silver

Gold




Legend

AVERAGE ASSIGNMENT SCORE >=10/25 AND EXAM SCORE >= 30/75 AND FINAL SCORE >=40
BASED ON THE FINAL SCORE, Certificate criteria will be as below:
>=90 - Elite + Gold
75-89 -Elite + Silver
>=60 - Elite
40-59 - Successfully Completed

Final Score Calculation Logic

  • Assignment Score = Average of best 8 out of 12 assignments.
  • Final Score(Score on Certificate)= 75% of Exam Score + 25% of Assignment Score
Digital VLSI Testing - Toppers list
Top 1 % of Certified Candidates

SATHIYA JOTHI 90%

INDIAN INSTITUTE OF INFORMATION TECHNOLOGY, DESIGN AND MANUFACTURING, KANCHEEPURAM


Top 2 % of Certified Candidates

NAVANEETH R 85%

Infineon Technologies AG

VENNAPUSA NIKHITHA 84%

JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY ANANTAPUR COLLEGE OF ENGINEERING


Top 5 % of Certified Candidates

JYOTSNA M 82%

NATIONAL INSTITUTE OF TECHNOLOGY, SURATHKAL

DIDLA DEEPTHI 80%

BEPARI SHAIK SABEEHA 78%

JNTUA COLLEGE OF ENGINEERING PULIVENDULA

HARSH SINGH 75%

NATIONAL INSTITUTE OF TECHNOLOGY

MANAV DEEP SACHDEVA 75%

S.R.M. INSTITUTE OF SCIENCE AND TECHNOLOGY

Enrollment Statistics

Total Enrollment: 5080

Registration Statistics

Total Registration : 250

Assignment Statistics



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Assignment

Exam score

Final score

Score Distribution Graph - Legend

Assignment Score: Distribution of average scores garnered by students per assignment.
Exam Score : Distribution of the final exam score of students.
Final Score : Distribution of the combined score of assignments and final exam, based on the score logic.