Course Name: Hardware modeling using verilog

Course abstract

The course will introduce the participants to the Verilog hardware description language. It will help them to learn various digital circuit modeling issues using Verilog, writing test benches, and some case studies.


Course Instructor

Media Object

Prof. Indranil Sengupta

Indranil Sengupta has obtained his B.Tech., M.Tech. and Ph.D. degrees in Computer Science and Engineering from the University of Calcutta. He joined the Indian Institute of Technology, Kharagpur, as a faculty member in 1988, in the Department of Computer Science and Engineering, where he is presently a full Professor. He had been the former Heads of the Department of Computer Science and Engineering and also the School of Information Technology of the Institute. He has over 28 years of teaching and research experience. He has guided 22 PhD students, and has more than 200 publications to his credit in international journals and conferences. His research interests include cryptography and network security, VLSI design and testing, and mobile computing.
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Teaching Assistant(s)

No teaching assistant data available for this course yet
 Course Duration : Sep-Nov 2020
  View Course
 Enrollment : 20-May-2020 to 21-Sep-2020
 Exam registration : 14-Sep-2020 to 02-Nov-2020
 Exam Date : 19-Dec-2020

Enrolled

4369

Registered

167

Certificate Eligible

130

Certified Category Count

Gold

3

Silver

47

Elite

52

Successfully completed

28

Participation

14

Success

Elite

Silver

Gold




Legend

AVERAGE ASSIGNMENT SCORE >=10/25 AND EXAM SCORE >= 30/75 AND FINAL SCORE >=40
BASED ON THE FINAL SCORE, Certificate criteria will be as below:
>=90 - Elite + Gold
75-89 -Elite + Silver
>=60 - Elite
40-59 - Successfully Completed

Final Score Calculation Logic

  • Assignment Score = Average of best 6 out of 8 assignments.
  • Final Score(Score on Certificate)= 75% of Exam Score + 25% of Assignment Score NOTE: Assignment Score/week = average of scores of all assignments in that week Best 6/8 such scores will be considered for Assignment Score out of 100
Hardware modeling using verilog - Toppers list
Top 1 % of Certified Candidates

FATEMA DALAL 94%

COLLEGE OF ENGINEERING PUNE


Top 2 % of Certified Candidates

JAIDURKESH S 92%

PSG COLLEGE OF TECHNOLOGY

PARTEEK 90%

PEC UNIVERSITY OF TECHNOLOGY


Top 5 % of Certified Candidates

BELLA SIVASHANKAR 88%

Indian Institute of Technology,Roorkee

SANDEEP CHAGARA 87%

Indian Institute of Technology,Indore

P AUGUSTA SOPHY BEULET 87%

VIT UNIVERSITY CHENNAI

SHEELA KRISHNA NAIK 86%

GOMATESH POLYTECHNIC

Enrollment Statistics

Total Enrollment: 4369

Registration Statistics

Total Registration : 167

Assignment Statistics



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Assignment

Exam score

Final score

Score Distribution Graph - Legend

Assignment Score: Distribution of average scores garnered by students per assignment.
Exam Score : Distribution of the final exam score of students.
Final Score : Distribution of the combined score of assignments and final exam, based on the score logic.