This course is about the automatic generation of digital circuits from high-level descriptions. Modern electronic systems are specified in Hardware Description Languages and are converted automatically into digital circuits. We will introduce the VHDL Hardware Description Language, and follow it up with a discussion of the basics of synthesis topics including High-level Synthesis, FSM Synthesis, Retiming, and Logic Synthesis.
Preeti Ranjan Panda received his B. Tech. degree in Computer Science and Engineering from the Indian Institute of Technology Madras and his M. S. and Ph.D. degrees in Information and Computer Science from the University of California at Irvine. He is currently a Professor in the Department of Computer Science and Engineering at the Indian Institute of Technology Delhi. He has previously worked at Texas Instruments, Bangalore, India, and the Advanced Technology Group at Synopsys Inc., Mountain View, USA, and has been a visiting scholar at Stanford University.
1148
73
53
1
12
29
11
5
AVERAGE ASSIGNMENT SCORE >=10/25 AND EXAM SCORE >= 30/75 AND FINAL SCORE >=40
BASED ON THE FINAL SCORE, Certificate criteria will be as below:
>=90 - Elite + Gold
75-89 -Elite + Silver
>=60 - Elite
40-59 - Successfully Completed